Online TDR List of References

This is the complete list of references as it appears in the Online TDR. Links to online versions of documents are given wherever possible.

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[1]        O. Callot et al., “Experience with the ALEPH Online system”,  ALEPH PUB 2001-003, June 2001.

[2]          A. Augustinus et al., “Designing a HEP Experiment Control System; lessons to be learned from 10 years evolution and operation of the DELPHI experiment”, Proceedings of the International Conference on Computing in High Energy Physics, Padova, Italy, February 2000, p. 287-290.

[3]          RD-12 Documentation [online] http://www.cern.ch/TTC/intro.html and references therein.

[4]          JCOP [online] http://itcowww.cern.ch/jcop/subprojects/Framework/welcome.html

[5]          PVSS [online] http://www.pvss.com/english/index.htm

[6]          LHCb Front-End Architecture [online] http://lhcb-elec.web.cern.ch/lhcb-elec/html/architecture.htm

[7]          R. Jacobsson, “How can I run my Detector”, LHCb 2001-140 DAQ.

[8]          R. Jacobsson and B. Jost, “Timing and Fast Control”, LHCb  2001-016 DAQ.

[9]          C. Gaspar, R. Jacobsson and B. Jost, “Partitioning in LHCb”, LHCb 2001‑116 DAQ.

[10]     J. Christiansen, “Requirements to the L0 front-end electronics”, LHCb 2001‑14

[11]     R. Jacobsson, B. Jost and Z. Guzik, “TFC Switch Specifications”, LHCb 2001-018 DAQ.

[12]     R. Jacobsson, B. Jost and Z. Guzik, “Readout Supervisor Design Specifications”, LHCb 2001-012 DAQ.

[13]     H. Ahmadi and W. E. Denzel, “A Survey of Modern High Performance Switching,” IEEE Journal on Selected Areas in Communications, vol. 7, no. 7, pp. 1091-1103, Sept. 1989.

[14]     J. Harvey, “Computing Model – Baseline model of LHCb’s distributed computing facilities," Draft, [online] http://lhcb-comp.web.cern.ch/lhcb-comp/computingmodel/ComputingModelV3.pdf

[15]     Z. Guzik and R. Jacobsson, “Odin – LHCb Readout Supervisor, Technical Reference,” Revision 1.4, Sep. 2001.

[16]     I. Garcia and J. Christiansen, “Simulation of the L0 front-end electronics,” LHCb 1999-047.

[17]     P. Vasquez and J. Christiansen, “Simulation of the LHCb L1 front-end,”  LHCb 2001-126.

[18]     R. Jacobsson, “Experience with the TFC Switch – Prototype 1,” [online]
http://lhcb‑comp.web.cern.ch/lhcbcomp/DAQ/TFC/documents/switch_experience.pdf, June 2001.

[19]     Nick Ellis and John Dawson, private communications.

[20]     H. Müller et al., “Readout Unit, FPGA version for link multipexers, DAQ and VELO trigger,” LHCb note Draft [online] http://hmuller.home.cern.ch/hmuller/RU/LHCbNote.pdf  

[21]     B. Jost et al. "The LHCb Trigger and Data Acquisition System," IEEE Real Time Conference June 14-18, 1999 Santa Fe.

[22]     LHCb Level-1 Vertex Topology Trigger, LHCb 1999-31.

[23]     J-P. Dufey et al., “Event-building in an intelligent Network Interface Card for the LHCB DAQ,” LHCb 2001-094.

[24]     A. Walsch et al., “Evaluation of SCI as a fabric for a computer based pattern recognition trigger running at 1.12 MHz,”  in Proc. 12th IEEE NPSS Real Time Conference, 2001, Valencia, p.11 ff.

[25]     Readout Unit II, Presentation in LHCb DAQ/FE workshop, January 2001, URL http:// hmuller.home.cern.ch/hmuller/RU/RU+Jan2001.PDF

[26]     A. Walsch, “A Hardware/Software Triggered DMA Engine,” LHCb 2001-125.

[27]     A. Guirao et al., “A networked mezzanine card Linux processor,” in Proc. 12th Real Time Congress on Nucl. and Plasma Sciences, Valencia June 2001, p 81 ff.

[28]     J. Toledo, H. Müller, F. Bal and B. Jost, “Readout Unit for the LHCb experiment," Fifth Workshop on Electronics for LHC experiments. Snowmass, Colorado. Sept. 1999

[29]     J. Toledo et al., “A Readout Unit for high rate applications,” in Proc. 12th Real Time Congress on Nucl. and Plasma Sciences, Valencia June 2001, p. 230 ff., to appear in IEEE Trans. Nucl. Sci.

[30]     W. Bux et al., “Technologies and Building Blocks for Fast Packet Forwarding,” IEEE Commun. Mag., Jan. 2001.

[31]     Network Processor Central, [online] http://www.linleygroup.com/npu/

[32]     B. Jost and N. Neufeld, “A versatile Network Processor based electronics module for the LHCb Data Acquisition System,” LHCb 2001-132

[33]     IBM PowerNP documentation [online]
http://www-3.ibm.com/chips/techlib/techlib.nsf/products/IBM_PowerNP_NP4GS3

[34]     IBM PowerNP Reference Platform [online]
http://www-3-.ibm.com/chips/techlib/techlib.nsf/products/IBM_PowerNP_NP4GS3_Reference_Platform

[35]     C. Gaspar, M. Dönszelmann, Ph. Charpentier, “DIM, a portable, light‑weight package for information publishing, data transfer and inter-process communication,” in Computer Physics Communications, October 2001. Vol 140, Num 1+2, p. 102-109.

[36]     B. Franek and C. Gaspar, “SMI++ - An Object Oriented Framework for Designing Distributed Control Systems,” in IEEE Trans. Nucl. Sci., Vol 45, Num 4, p.1946-1950), August 1998.

[37]     OPC foundation, [online]  http://www.opcfoundation.org/

[38]     W. Salter (ed.), “JCOP Architecture Working Group, “Framework Design Proposal,” CERN-JCOP-2000-007, October 2001, [online] http://itcowww.cern.ch/jcop/subprojects/Architecture/Framework/AWGReport.pdf

[39]     LHC Data Interchange WG, “User Requirements,” Report_0600, June 2000, http://wwwlhc.cern.ch/Controls/WG/LDIWG/Report0600.PDF

[40]     D. Breton and Ph. Cros, “Serial Protocol for the Experiment Control System of LHCb,” LHCb  2001-144, July 2001, [online]  http://www.lal.in2p3.fr/technique/se/pub/lhcb/PCItoSPECS/SPECS.pdf

[41]     See e.g. http://atlasinfo.cern.ch/ATLAS/GROUPS/DAQTRIG/DCS/ELMB/elmb.html and links therein.

[42]     C. Gaspar, B. Jost, N. Neufeld and  S. M. Schmeling, “The Use of Credit Card-sized PCs for interfacing electronics boards to the LHCb ECS,” LHCb 2001-147

[43]     Conditions Database see e.g. http://wwwinfo.cern.ch/db/objectivity/docs/conditionsdb/ and references therein.

[44]     See e.g. http://lhcb-comp.web.cern.ch/lhcb-comp/ECS/pdf/mccontrol_report.pdf

[45]     http://www.spec.org/

[46]     Moore’s Law at Intel, http://www.intel.com/research/silicon/mooreslaw.htm

[47]     S. Bethke et al., “Report of the Steering Group of the LHC Computing Review,” CERN/LHCC/2001-004 CERN/RRB-D-2001-3, Feb. 2001.

[48]     Network Technology Tracking Team (NT3) Report 1999
[online] http://it-div-cs.web.cern.ch/it-div-cs/public/studies/nt3/nt3-1999.html

[49]     GAUDI : The software architecture and framework for building LHCb data processing applications, Pres. at: International Conference on Computing in High Energy and Nuclear Physics, Padua, Italy, 7 - 11 Feb 2000 / Ed. by Mazzucato, Mirco - INFN, Padua, 2000. - Comput. Phys. Commun. : 140 (2001) no.1-2 - pp.92﷓95

[50]     Myricom [online] http://www.myri.com/

[51]     J.-P. Dufey et al., “The LHCb trigger and data acquisition system,” IEEE Trans. Nucl. Sci. : 47 (2000) no.2, pp.86-90

[52]     Ch. E. Spurgeon, Ethernet – The Definitive Guide, O’Reilly & Associates, Sebastopol, 2000

[53]     IEEE 802.3 Carrier Sense Multiple Access with Collision Detection (CSMA/CD) Access Method and Physical Layer Specifications, 2000 ed.

[54]     See http://www.oti.net/Systems/Foundry/PDF/big_iron.pdf for more details

[55]     J-P. Dufey, B. Jost, N. Neufeld and K. Paszkiewicz, “Results of Benchmark Tests upon a Gigabit Ethernet Switch,” LHCb 2001-129

[56]     B. Jost, J-P. Dufey, N. Neufeld and M. Zuin, “Event-building in an Intelligent Network Interface Card for the LHCb Readout Network,” IEEE Trans. Nucl. Sci. vol. 48, 4

[57]     M. Zuin, "Embedded Event-Building on a Gigabit Ethernet Network for the LHCb Experiment", Tesi di Laurea, Università Ca' Foscari - Venezia, 2000

[58]     C. Bizeau et al., “RD31 Status Report ’97,” CERN/LHCC/97-05

[59]     N. Neufeld, “Implementation of the Event Filter Farm CPU node”, LHCb 2001-143

[60]     RLX System 324, [online] http://www.rlxtechnologies.com/home.html

[61]     D. Clark et al., “An Analysis of TCP processing overhead,” IEEE Commun. Mag., vol 27, no 6, pp. 23-29, June 1989.

[62]     I. Pratt and K. Fraser, “Arsenic: a User-accessible Gigabit Ethernet Interface,” Presented at IEEE INFOCOM 2001. [online] Available: http://infocom.ucsd.edu/papers/394-3981268191.pdf

[63]     J.-P. Dufey et al., “The LHCb Trigger and Data Acquisition System,” IEEE Trans. Nucl. Sci., vol. 47, No 2, April 2000.

[64]     M.J. Karol et al., “Input versus Output Queuing on a Space-Division Packet Switch,” IEEE Trans. Commun., vol. Com-35, No 12, Dec. 1987.

[65]     G. Antchev et al., “The CMS Event-Builder Demonstrator based on Myrinet,” IEEE Trans. Nucl. Sci., vol. 47, No 2, April 2000.

[66]     Prizma, [online] http://www.zurich.ibm.com/cs/powerprs.html and references therein.

[67]     CERN ECP/FEX: CASCADE User’s Guide, CERN, Geneva, 1997

[68]     S. Schmeling, “LHCb Testbeam DAQ and Controls Support,”
 [online]. Available: http://cern.ch/LHCb-Testbeam

[69]     S. Schmeling and R. Beneyton, “LHCb Testbeam 101,”  LHCb‑2001‑111